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PIC18F66K80 FAMILY
DS39977F-page 224
2010-2012 Microchip Technology Inc.
16.1
Timer3 Gate Control Register
The Timer3 Gate Control register (T3GCON), provided
in Register 14-2, is used to control the Timer3 gate.
REGISTER 16-2:
T3GCON: TIMER3 GATE CONTROL REGISTER(1)
R/W-0
R-x
R/W-0
TMR3GE
T3GPOL
T3GTM
T3GSPM
T3GGO/T3DONE
T3GVAL
T3GSS1
T3GSS0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR3GE:
Timer3 Gate Enable bit
If TMR3ON = 0:
This bit is ignored.
If TMR3ON = 1:
1
= Timer3 counting is controlled by the Timer3 gate function
0
= Timer3 counts regardless of Timer3 gate function
bit 6
T3GPOL:
Timer3 Gate Polarity bit
1
= Timer3 gate is active-high (Timer3 counts when gate is high)
0
= Timer3 gate is active-low (Timer3 counts when gate is low)
bit 5
T3GTM:
Timer3 Gate Toggle Mode bit
1
= Timer3 Gate Toggle mode is enabled.
0
= Timer3 Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer3 gate flip-flop toggles on every rising edge.
bit 4
T3GSPM:
Timerx Gate Single Pulse Mode bit
1
= Timer3 Gate Single Pulse mode is enabled and is controlling Timer3 gate
0
= Timer3 Gate Single Pulse mode is disabled
bit 3
T3GGO/T3DONE:
Timer3 Gate Single Pulse Acquisition Status bit
1
= Timer3 Gate Single Pulse mode acquisition is ready, waiting for an edge
0
= Timer3 Gate Single Pulse mode acquisition has completed or has not been started
This bit is automatically cleared when T3GSPM is cleared.
bit 2
T3GVAL:
Timer3 Gate Current State bit
Indicates the current state of the Timerx gate that could be provided to TMR3H:TMR3L. Unaffected by
Timerx Gate Enable (TMR3GE) bit.
bit 1-0
T3GSS<1:0>:
Timer3 Gate Source Select bits
11
= Comparator 2 output
10
= Comparator 1 output
01
= TMR4 to match PR4 output
00
= Timer3 gate pin
Watchdog Timer oscillator is turned on if TMR3GE = 1, regardless of the state of TMR3ON.
Note 1:
Programming the T3GCON prior to T3CON is recommended.
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